VHDL is one of the most Hardware Description Language used. This Description Language has many advantages over the others: VHDL has powerful synthesis functions allowing a strong and friendly design reuse methodology. This single advantage is so strong designers should not look aside. Good digital designs are generic a parameterizable. They are easy to maintain, reuse and help to produce complex system quicker. So, How to learn VHDL? 1. Learn Boolean algebra/ Boolean logic This will give you a better comprehension about the logic of a digital circuit and an overview on how computation is done on basic circuits. http://en.wikibooks.org/wiki/Digital_Circuits 2. Learn Finite state machine and Sequential Logic. http://en.wikipedia.org/wiki/Finite_state_machine Those two notions are absolute prerequisite to start coding in VHDL. This done, you can start a VHDL tutorial and then you're ready for the next chapters.